C Program for Simple/Linear QUEUE Operations – Using Array

Saturday, June 9th, 2012  »  Posted By  »  Total 1 Comment

Source: Dr. G T Raju, Professor & Head, Dept. of CSE, RNSIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 […]

C program to insert Student Records to a Sequential File

Saturday, June 9th, 2012  »  Posted By  »  Total 0 Comment

Source: Dr. G T Raju, Professor & Head, Dept. of CSE, RNSIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 […]

Verilog HDL Program for Decade Counter

Simulated Waveform for Decade Counter Saturday, June 9th, 2012  »  Posted By  »  Total 0 Comment

Verilog HDL Program for Decade Counter. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 module mod10(qo,clk); output [3:0]qo; input clk; inv u1(qc,q3); inv u2(qb,q1); inv u3(qa,q0); and1 u4(j3,q1,q0,q2); assign k3=q0; and1 u5(k2,q1,q0); assign j2=k2; and1 u6(j1,qc,q0); assign k1=q0; assign j0=1′b1; assign k0=1′b1; jk1 […]

Verilog HDL Program for D flip flop using RS flip flop

Simulated Waveform for D flip flop using RS flip flop Saturday, June 9th, 2012  »  Posted By  »  Total 1 Comment

Verilog HDL Program for D flip flop using RS flip flop. 1 2 3 4 5 6 7 module sr2d(q,q1,d,clk); output q,q1; input d,clk; wire x; inv u1(x,d); srff u2(q,q1,x,d,clk); //srff u(q,q1,r,s,clk); endmodule

Verilog HDL Program for T Flip Flop

Simulated Wave form for Toggle flip flop Saturday, June 9th, 2012  »  Posted By  »  Total 0 Comment

A flip-flop or latch is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and […]

Verilog HDL Program for D Flip Flop

Simulated waveform for D Flip Flop Saturday, June 9th, 2012  »  Posted By  »  Total 1 Comment

A flip-flop or latch is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and […]

Verilog HDL Program for R-S Flip Flops

RS Flip Flop Saturday, June 9th, 2012  »  Posted By  »  Total 0 Comment

A flip-flop or latch is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and […]

Verilog HDL program for 4-BIT Parallel Adder

Simulated waveform for Parallel Adder Saturday, June 2nd, 2012  »  Posted By  »  Total 0 Comment

A 4 bit binary parallel adder can be formed by cascading four full adder units. The carry of each stage is connected to the next unit as the carry in (That is the third input). 1 2 3 4 5 6 7 8 9 10 module parad4(a,c,p,q); output [3:0]a; output c; input [3:0]p,q; wire c1,c2,c3; […]

Java program to display triangle 1 24 369 481216

Saturday, February 5th, 2011  »  Posted By  »  Total 1 Comment

/* Display Triangle as follow 1 2 4 3 6 9 4 8 12 16 … N (indicates no. of Rows) */ class Output3{ public static void main(String args[]){ int n = Integer.parseInt(args[0]); for(int i=1;i

Java program to display triangle 0 10 101 0101

Saturday, February 5th, 2011  »  Posted By  »  Total 4 Comments

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 /* Display Triangle as follow 0 1 0 1 0 1 0 1 0 1 */ class Output2{ public static void main(String args[]){ for(int i=1;i<=4;i++){ for(int j=1;j<=i;j++){ System.out.print(((i+j)%2)+" "); } System.out.print("\n"); } } }

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