Verilog HDL Program for T flip flop using RS flip flop

Verilog HDL Program for T flip flop using RS flip flop.

1
2
3
4
5
6
7
8
module sr2t(q,q1,t,clk);
output q,q1;
input t,clk;
wire x,y;
and1 u1(x,t,q1);
and1 u2(y,t,q);
srff u3(q,q1,y,x,clk); //srff u(q,q1,r,s,clk);
endmodule
Simulated Waveform for T flip flop using RS flip flop
Simulated Waveform for T flip flop using RS flip flop

One Response to “Verilog HDL Program for T flip flop using RS flip flop”

Leave a Reply