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Verilog HDL Program for T flip flop using RS flip flop

Saturday, June 9th, 2012

Verilog HDL Program for T flip flop using RS flip flop.

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module sr2t(q,q1,t,clk);
output q,q1;
input t,clk;
wire x,y;
and1 u1(x,t,q1);
and1 u2(y,t,q);
srff u3(q,q1,y,x,clk); //srff u(q,q1,r,s,clk);
endmodule
Simulated Waveform for T flip flop using RS flip flop

Simulated Waveform for T flip flop using RS flip flop

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